Compact Digital Next>series – Solutions for High Frequency Digital Testing
The most recent innovations in digital components require a more sophisticated digital tester featuring capabilities that go beyond the simple logic analyzer. Industrial manufacturing requires processing capabilities at the hardware level to speed up test times. At the same time, the new logic families, based on featuring variable voltage levels and single or differential signals continue to make these even more complex.
The tester designated as Compact Digital Test System (DTS) Next>series is Seica response to the constant demand for testing integrated devices via vector-based techniques and dedicated protocols such as Boundary Scan, without excluding the need to combine the in-circuit test as well.
ATE Resources –ICT and functional testing
Like any other Seica solution, the Compact DTS Next>series test system, uses the VIP platform, whose main feature is the possibility to deliver the best integration of technology and easiness of use, providing the user with all of the capabilities required for both in-circuit and functional testing without necessarily being an expert.
This is possible thanks to the cutting-edge measurement system (based on ACL proprietary module) and to the VIVA management software. The first one, implemented on DSP technology, integrates all of the testing capabilities while enabling the fully-automated test execution. Moreover, the communication to the Main PC via optical fiber cable minimizes sensitiveness to external disturbances. The second one, designed with a simple and user-friendly logic, provides operational autonomy in terms of system management and testing routines executions. With the Quick Test module, a graphical software specifically designed for compiling and running functional tests in reduced time frames; the operator can properly program any system resources without knowing neither the internal architecture nor a specific programming language.
Digital testing up to 25 MHz
Beside the fact that the ACL module already features 4 digital channels on every TP, Seica has developed and improved its hardware for digital testing over time, reaching the performances and capabilities integrated in the F50 module.
This is a 32 digital channel board, that can reach up to 25 MHz pattern rate. It includes digital drivers and sensors (with signal voltage programming up to 12V and a dedicated on-board 256Kb memory), 4 pulse generators that can also operate in clock-free running mode (1 every 8 channels of the board) making it either synchronous or asynchronous with respect to the digital patterns. All this, combined with the 4 independent frequency, period or pulse meters and the resources for 2-line analog testing, make the F50 a state-of-the-art solution.
Capitalizing on the thirty-year experience of Seica in electronic testing, the VIVA Environment offers a set of options and capabilities that make it really flexible and easy to use. This software allows the user to combine ICT and functional testing, for an improved process speed and fault coverage through a Functional Graphic Environment which guides the user through the steps of test program creation and execution. A dedicated environment NVL (Neutral VIVA Language) is available for digital test development, where it is possible to check, debug and execute programs. This environment enables the simultaneous handling and integration of analog, digital functional and “management” instructions, in order to implement a complete functional test.
In case of memory programming (e.g. I2C, SPI protocol), NVL allows an easy integration and direct use of standard Intel/Motorola (.bin, .mot, .hex) programming files. A graphical tool featuring waveform acquisition capabilities via external probe or internal channel further facilitates repair in the event of digital functional testing. The open architecture of the VIVA software makes it compatible with other programming languages (e.g. Python, VBS) and third-party software modules (EXE. and .DLL).
Different configurations for an enhanced implementation The digital part of a DTS tester can be configured to meet different requirements, and to achieve the best performance:
– Use of the direct digital channel connection of the F50 board. The system resources available are fully digital.
– Implementation of direct hybrid channels by combining F50 and S64 boards. This solution will make available on test points all of the digital and analog resources of the Compact DTS Next>series tester. This is a direct channel configuration, thus enabling recovery of existing fixtures implemented on other test systems
– Multiplexing digital channels. If a high number of digital channel is necessary, Seica can also provide a cost-effective solution to multiplex the digital channels (even with 1:8 ratio) making the DTS tester a full digital system optimizing system resources.
While maintaining the core features of the product family, the Compact DTS Next>series has been designed to provide immediate in-line integration, since any element which made it incompatible with robotized lines from a mechanical point of view has been reduced.
The use of a vacuum receiver, optionally available along with the standard pneumatic receiver, makes the product even more compact, while providing enhanced flexibility of using different types of fixture depending on the requirements.
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